Content addressable memory (CAM) based robust anonymous authentication and integrity preservation scheme for wireless body area networks (WBAN)

被引:0
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作者
Arun Sekar Rajasekaran
M. Azees
Chandra Sekhar Dash
Anand Nayyar
机构
[1] SR University,Department of ECE
[2] VIT-AP University,School of Computer Science and Engineering
[3] Centurion University of Technology and Management,Department of ECE
[4] Duy Tan University,Graduate School, Faculty of Information Technology
来源
关键词
Wireless body area networks (WBAN); Authentication; Integrity; Privacy; Security; Cygwin; Cadence tool;
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中图分类号
学科分类号
摘要
Health plays a foremost role for every individual. To preserve the health, continuous monitoring of health is essential. Wireless Body Area Network (WBAN) is a type of wireless network used to monitor the health and fitness-related parameters of the human body. It is a short-range wireless network that connects wearable and implanted devices to each other and to a centralized server for data collection and analysis. As the advancement in the medical field increases, the security threats to health-related medical data also increases. The medical data of each individual (patient) is highly confidential. So, the privacy and security of this confidential information are of prior importance. Though several schemes have been proposed in the previous years, the anonymity and integrity preservation with lightweight is not addressed effectively. The proposed idea is to develop an anonymous integrity-preserved authenticated lightweight scheme based on Elliptic curve cryptography (ECC). The performance investigation of this scheme proves to be more efficient in terms of computational cost i.e., only 3.8 ms (27.53% less) is required for performing the authentication. Moreover, communicational cost at the doctor’s side requires 960 bits (41.17% less) when compared to related schemes. In addition, the suggested scheme can serve up to a maximum of 6250 users in one minute. The analysis is simulated using the Cygwin software tool and its reports are analysed and proved to be noteworthy. Further, a health monitoring system is designed using Verilog Hardware description language (HDL). Finally, hardware implementation is done in - EDGE ZYNQ 7000 SoC FPGA Development board and synthesized using the Cadence tool using CMOS GPDK 90 nm technology.
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页码:20429 / 20455
页数:26
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