Introducing a buried pure silicon layer in SOI-MESFET transistor to increase the breakdown voltage by modifying carriers and electric field distribution

Due to the desirable features of the silicon-on-insulator metal-semiconductor field-effect transistor (SOI MESFET), there are convincing reasons for the massive use of these devices in space and military applications, including microwave devices, communication circuits, and optic applications. In this paper, a novel device of an SOI-MESFET transistor is designed and optimized using a silicon-buried layer under the gate electrode. In the proposed device, simple but very effective changes are made without significant damage to other operational parameters of the base technology to increase the breakdown voltage in the SOI-MESFET transistor. During these changes, initially having the penetration gate electrode into the channel, the area of the critical points of the channel increased. This increase led to the distribution of electric charge over a larger volume, thereby reducing areas that were too dense in terms of charge. The next step is to place a buried layer of pure silicon in the oxide area below the gate toward the drain, which absorbs the charge carriers and diverts the electric field lines from the sensitive electrode area of the gate. These changes increased the device’s breakdown voltage by distributing the electric field and the charge density away from the critical points around the gate electrode. Finally, the proposed composite device increases the breakdown voltage by 79%. The breakdown voltage of this device is 17 V, while the breakdown voltage of its normal device is about 9.5 V.