A Three-Stage Coarse-Fine-Tuning Analog-Assisted Digital LDO

This paper proposes a three-stage coarse-fine-tuning analog-assisted digital low dropout regulator (AAD-LDO) without digital ripple. The digital regulation consists of two stages, which break the accuracy-speed-power trade-off. To further improve transient response, a step-variable counter used in the first stage is designed, which makes sure that the output current can track the load current rapidly. The ripple caused by the digital regulation disappears due to the existence of the analog-assistant stage (in the proposed AAD-LDO). As a result, the AAD-LDO achieves the output voltage with high accuracy. Designed in a 0.18 mu m CMOS process, the proposed AAD-LDO has a layout area of 0.133mm. For the input range of 1.2-1.8V, the output voltage is 1V. The maximum load current is 10mA at the input voltage of 1.2V. The linear regulation and load regulation are 0.061mV/V and 0.0082mV/mA, respectively. The over/undershoot is suppressed effectively for a 9.5mA load step. The peak current efficiency is 99.78%.