A 16-Core Voltage-Stacked System With Adaptive Clocking and an Integrated Switched-Capacitor DC-DC Converter

被引:17
|
作者
Lee, Sae Kyu [1 ]
Tong, Tao [1 ]
Zhang, Xuan [1 ,2 ]
Brooks, David [1 ]
Wei, Gu-Yeon [1 ]
机构
[1] Harvard Univ, Sch Engn & Appl Sci, Cambridge, MA 02138 USA
[2] Washington Univ, St Louis, MO 63130 USA
关键词
Adaptive frequency clocking (AFClk); dc-dc converter; multicore; power delivery; voltage noise; voltage stacking; POWER DELIVERY; ENERGY;
D O I
10.1109/TVLSI.2016.2633805
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a 16-core voltage-stacked system with adaptive frequency clocking (AFClk) and a fully integrated voltage regulator that demonstrates efficient on-chip power delivery for multicore systems. Voltage stacking alleviates power delivery inefficiencies due to off-chip parasitics but adds complexity to combat internal voltage noise. To address the corresponding issue of internal voltage noise, the system utilizes an AFClk scheme with an efficient switched-capacitor dc-dc converter to mitigate noise on the stack layers and to improve system performance and efficiency. Experimental results demonstrate robust voltage noise mitigation as well as the potential of voltage stacking as a highly efficient power delivery scheme. This paper also illustrates that augmenting the hardware techniques with intelligent workload allocation that exploits the inherent properties of voltage stacking can preemptively reduce the interlayer activity mismatch and improve system efficiency.
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页码:1271 / 1284
页数:14
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