Experimental and analytical study on the flow of encapsulant during underfill encapsulation of flip-chips

被引:17
|
作者
Han, SJ [1 ]
Wang, KK [1 ]
Cho, SY [1 ]
机构
[1] CORNELL UNIV,SIBLEY SCH MECH & AEROSP ENGN,CORNELL INJECT MOLDING PROGRAM,ITHACA,NY 14853
关键词
D O I
10.1109/ECTC.1996.517409
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
引用
收藏
页码:327 / 334
页数:4
相关论文
共 50 条
  • [21] Characterization of a No-Flow underfill encapsulant during the solder reflow process
    Wong, CP
    Baldwin, D
    Vincent, MB
    Fennell, B
    Wang, LJ
    Shi, SH
    [J]. 48TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 1998 PROCEEDINGS, 1998, : 1253 - 1259
  • [22] A comparative study on direct Cu–Cu bonding methodologies for copper pillar bumped flip-chips
    Y. Ma
    A. Roshanghias
    A. Binder
    [J]. Journal of Materials Science: Materials in Electronics, 2018, 29 : 9347 - 9353
  • [23] A novel analytical filling time chart for design optimization of flip-chip underfill encapsulation process
    Fei Chong Ng
    M. Yusuf Tura Ali
    Aizat Abas
    C. Y. Khor
    Z. Samsudin
    M. Z. Abdullah
    [J]. The International Journal of Advanced Manufacturing Technology, 2019, 105 : 3521 - 3530
  • [24] No-flow underfill flip chip assembly - an experimental and modeling analysis
    Lu, H
    Hung, KC
    Stoyanov, S
    Bailey, C
    Chan, YC
    [J]. MICROELECTRONICS RELIABILITY, 2002, 42 (08) : 1205 - 1212
  • [25] Analytical and numerical analyses of filling progression and void formation in flip-chip underfill encapsulation process
    Ng, Fei Chong
    Abas, Aizat
    Nashrudin, Muhammad Naqib
    Tura Ali, M. Yusuf
    [J]. SOLDERING & SURFACE MOUNT TECHNOLOGY, 2022, 34 (04) : 193 - 202
  • [26] A Multiscale Modeling and Experimental Study of Underfill Flow and Void Formation for Flip-Chip Packages
    Zhou, Siyi
    Sun, Ying
    Libres, Jeremias
    Gurrum, Siva
    Thompson, Patrick
    [J]. 2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, 2009, : 2004 - +
  • [27] A novel analytical filling time chart for design optimization of flip-chip underfill encapsulation process
    Ng, Fei Chong
    Ali, M. Yusuf Tura
    Abas, Aizat
    Khor, C. Y.
    Samsudin, Z.
    Abdullah, M. Z.
    [J]. INTERNATIONAL JOURNAL OF ADVANCED MANUFACTURING TECHNOLOGY, 2019, 105 (7-8): : 3521 - 3530
  • [28] A comparative study on direct Cu-Cu bonding methodologies for copper pillar bumped flip-chips
    Ma, Y.
    Roshanghias, A.
    Binder, A.
    [J]. JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS, 2018, 29 (11) : 9347 - 9353
  • [29] Reliability Study of Lead-Free Flip-Chips with Solder Bumps Down to 30 μm Diameter
    Haerter, Stefan
    Dohle, Rainer
    Reinhardt, Andreas
    Gossler, Joerg
    Franke, Joerg
    [J]. 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 583 - 589
  • [30] Flow Behavior Analysis of Emc in Molded Underfill (Muf) Encapsulation for Multi Flip-Chip Package
    Azmi, M. A.
    Abdullah, M. K.
    Abdullah, M. Z.
    Ariff, Z. M.
    Ismail, A.
    Aziz, M. S. Abdul
    [J]. REGIONAL CONFERENCE ON MATERIALS AND ASEAN MICROSCOPY CONFERENCE 2017 (RCM & AMC 2017), 2018, 1082