A unified approach for SOC testing using test data compression and TAM optimization

被引：0

作者：

Iyengar, V ^{[1
]}

Chandra, A ^{[1
]}

Schweizer, S ^{[1
]}

Chakrabarty, K ^{[1
]}

机构：

[1] IBM Microelect, Essex Jct, VT 05452 USA

来源：

DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, PROCEEDINGS | 2003年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We integrate for the first time test access mechanism (TAM) optimization and test data compression into a single test methodology. We show how an integrated test architecture based on TAMs and test data decoders can be designed The proposed approach offers considerable savings in test data volume and testing time. Two case studies using the integrated test architecture are presented.

引用

页码：1188 / 1189

页数：2

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