Log-domain linear SVM classifier

被引：0
|
作者：
Festila, L. [1 ]
Groza, R. [1 ]
Cirlugea, M. [1 ]
Fazakas, A. [1 ]
机构：
[1] Tech Univ Cluj Napoca, Basic Elect Dept, Cluj Napoca, Romania
来源：
MIXDES 2007: Proceedings of the 14th International Conference on Mixed Design of Integrated Circuits and Systems: | 2007年
关键词：
support vector machines; classifier; log-domain; VLSI architectures; analog multipliers;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We develop in this paper support vector machine (SVM) parallel classifier for image classifications. The SVM classifier basic modules are new modular log-domain four-quadrant current multipliers. The circuit was simulated taking into account real parameters of transistors in BiCMOS technology. There are many advantages of using such modular log-domain structures in high frequency large dimension circuits and designs.
引用
收藏
页码：301 / 304
页数：4
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