Log-domain binary SVM image classifier

We propose in this paper a binary log-domain Support Vector Machine classifier based on a polynomial decision function. To implement such a classifier log-domain multipliers proposed by the authors are used. For the parallel-serial implementation a log-domain summing amplifier and a current mode comparator are also needed. Current mode log-domain design is used for its low voltage, low power and high frequency characteristics. The resulted classifier is simulated taking into account real parameters of transistors in BiCMOS technology.