Hierarchical composite regular parallel architecture

被引：0
|
作者：
Manjunathaiah, M. [1 ]
机构：
[1] Univ Reading, Sch Syst Engn, Reading, Berks, England
来源：
EIGHTH INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED COMPUTING, PROCEEDINGS | 2009年
关键词：
D O I：
10.1109/ISPDC.2009.41
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
The design space of emerging heterogenous multi-core architectures with re-configurability element makes it feasible to design mixed fine-grained and coarse-grained parallel architectures. This paper presents a hierarchical composite array design which extends the curret design space of regular array design by combining a sequence of transformations. This technique is applied to derive a new design of a pipelined parallel regular array with different dataflow between phases of computation.
引用
收藏
页码：253 / 256
页数：4
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