A model for the distortion due to switch on-resistance in sample-and-hold circuits

被引：0
|
作者：
Centurelli, Francesco [1 ]
Monsurro, Pietro [1 ]
Trifiletti, Alessandro [1 ]
机构：
[1] Univ Roma La Sapienza, Dipartimento Ingn Elettron, Via Eudossiana 18, I-00184 Rome, Italy
来源：
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A behavioral model of a sample-and-hold circuit is presented, focused on the distortion due to the nonlinear switch On-resistance. A simplified expression for third-order harmonic distortion has been derived, by using a quadratic MOS model where body effect is neglected, and it h as been extended to the case of a transmission gate switch. Both the behavioral model and the distortion estimation have been validated by comparison with Cadence simulations, and very low errors have been obtained over a wide range of circuital and signal parameters.
引用
收藏
页码：4787 / +
页数：2
相关论文
共 50 条
  • [1] A behavioral model for the non-linear on-resistance in sample-and-hold analog switches
    Prodanov, W
    Valle, M
    PROCEEDINGS OF THE 2005 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOL 1, 2005, : 111 - 114
  • [2] A macromodel of sample-and-hold circuits
    Jorges, U
    Jummel, G
    Muller, G
    Reinhold, M
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 1997, 25 (06) : 483 - 502
  • [3] An analytical compensation for the sample-and-hold distortion
    Mayer, J
    Seara, R
    Noceti, S
    Bermudez, JCM
    38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1996, : 1197 - 1200
  • [4] A Compact Calibration Model for Linearizing CMOS Sample-and-Hold Circuits
    Li, Yanqing
    Zhou, Yuan
    Chiu, Yun
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2020, 67 (11) : 2327 - 2331
  • [5] A NEW METHOD TO COMPENSATE FOR THE SAMPLE-AND-HOLD DISTORTION
    MARVASTI, F
    IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1985, 33 (03): : 738 - 741
  • [6] SELF-EQUALIZING SAMPLE-AND-HOLD CIRCUITS
    GREGORIAN, R
    TEMES, GC
    ELECTRONICS LETTERS, 1979, 15 (13) : 367 - 368
  • [7] TRANSIENT-RESPONSE OF SAMPLE-AND-HOLD CIRCUITS
    GURYANOV, B
    ELECTRONICS LETTERS, 1980, 16 (04) : 123 - 124
  • [8] Sample-and-hold circuit with dynamic switch leakage compensation
    Zou, L.
    Pathrose, J.
    Chai, K. T. C.
    Je, M.
    Xu, Y. P.
    ELECTRONICS LETTERS, 2013, 49 (21) : 1323 - 1325
  • [9] Accurate sample-and-hold circuit model
    Xu, G
    Yuan, J
    ELECTRONICS LETTERS, 2005, 41 (09) : 520 - 522
  • [10] Comprehensive Analysis of Distortion in the Passive FET Sample-and-Hold Circuit
    Iizuka, Tetsuya
    Ito, Takaaki
    Abidi, Asad A.
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2018, 65 (04) : 1157 - 1173
12345