In this paper, we present a novel method to reduce the subthreshold swing (SS) of FETs below 60 mV/decade. Through modeling, we directly relate trap charge movement between the gate electrode and the gate dielectric to SS reduction. We experimentally investigate the impact of charge exchange between a Cu gate electrode and a 5-nm-thick amorphous Al2O3 gate dielectric in an InGaZnO4 thin-film transistor. Positive trap charges are generated inside the gate dielectric while the semiconductor is in accumulation. During the subsequent detrapping, the SS diminishes to a minimum value of 46 mV/decade at room temperature. Furthermore, we relate the charge trapping/detrapping effects to a negative capacitance behavior of the Cu/Al2O3 metal-insulator structure.
机构:
Univ Seoul, Dept Elect & Comp Engn, Seoul 02504, South KoreaUniv Seoul, Dept Elect & Comp Engn, Seoul 02504, South Korea
Lee, Hyunjae
Goh, Youngin
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机构:
Korea Univ, Dept Appl Phys, Segong 339700, South KoreaUniv Seoul, Dept Elect & Comp Engn, Seoul 02504, South Korea
Goh, Youngin
Jeon, Sanghun
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机构:
Korea Univ, Dept Appl Phys, Segong 339700, South KoreaUniv Seoul, Dept Elect & Comp Engn, Seoul 02504, South Korea
Jeon, Sanghun
Shin, Changhwan
论文数: 0引用数: 0
h-index: 0
机构:
Univ Seoul, Dept Elect & Comp Engn, Seoul 02504, South Korea
SK Hynix, Icheon, South KoreaUniv Seoul, Dept Elect & Comp Engn, Seoul 02504, South Korea
Shin, Changhwan
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY,
2017,
5
(05):
: 306
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309