Mitigating the influence of wafer topography on the implantation process in optical lithography

被引：0
|
作者：
Dong, Lisong [1 ]
Chen, Wenhui [1 ]
Fan, Taian [1 ]
Su, Xiaojing [1 ]
Wei, Yayi [1 ,2 ,3 ]
Ye, Tianchun [1 ,2 ,3 ]
机构：
[1] Chinese Acad Sci, Inst Microelect, Beijing 100029, Peoples R China
[2] Chinese Acad Sci, Inst Microelect, Key Lab Microelect Devices & Integrated Technol, Beijing 100029, Peoples R China
[3] Univ Chinese Acad Sci, Sch Microelect, Beijing 100049, Peoples R China
来源：
OPTICS LETTERS | 2017年 / 42卷 / 15期
基金：
中国国家自然科学基金;
关键词：
COMPENSATION;
D O I：
10.1364/OL.42.002934
中图分类号：
O43 [光学];
学科分类号：
070207 ; 0803 ;
摘要：
Residual resist in the gate caused by wafer topography would prevent part of the fins from ion implantation. It is a big concern in semiconductor manufacturing. The optical interference intensity improvement of the region located between two gates induced by substituting the material of the sidewall of the gate with silicon oxide is discussed in this Letter. The relationship between the thickness of silicon oxide and optical intensity at the fin's top is also established from the rigorous coupled wave analysis method. Based on this correlation, the method for mitigating the wafer topography of the implantation process is put forward and evaluated from rigorous numerical simulations. The proposed method requires neither a specific system setup nor an additional etch process, which is a tremendous cost saver in mass production. (C) 2017 Optical Society of America
引用
收藏
页码：2934 / 2937
页数：4
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