Design of highly parallel linear digital circuits based on symbol-level redundancy

被引：2
|
作者：
Nakajima, M [1 ]
Kameyama, M [1 ]
机构：
[1] TOHOKU UNIV,GRAD SCH INFORMAT SCI,DEPT MATH & COMP SCI,AOBA KU,SENDAI,MIYAGI 98077,JAPAN
来源：
1996 26TH INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS | 1996年
关键词：
D O I：
10.1109/ISMVL.1996.508344
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
引用
收藏
页码：104 / 109
页数：6
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