Advanced 22 nm FD-SOI devices integration platform

被引：0
|
作者：
Tian, Ming [1 ]
Xu, Cuiqin [1 ]
Lei, Haibo [1 ]
机构：
[1] Shanghai Huali Integrated Circuit Corp, Technol Dev Dept, Shanghai, Peoples R China
来源：
2019 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2019年
关键词：
FD-SOI process; 22 nm technology node; high-k first; metal-gate last; temperature dependence; BODY;
D O I：
10.1109/S3S46989.2019.9320694
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this work, integration of 22 nm fully depleted silicon- on-insulator (FD-SOI) process with High-k first, metal gate last is demonstrated. The fabricated logic N-type MOSFET (NFET) and P-type MOSFET (PFET) show very good short channel effect (SCE) control. The logic NFET/PFET characteristics under different temperatures are measured and analyzed. Threshold voltage to temperature sensitivity is evaluated for using the back bias to tune device and get performance/power balance. The optimization of static noise margin of SRAM is also studied.
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页数：4
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