Profiling dependence vectors for loop parallelization

被引：0
|
作者：
Tseng, SY [1 ]
King, CT [1 ]
Tang, CY [1 ]
机构：
[1] NATL TSING HUA UNIV,DEPT COMP SCI,HSINCHU 30043,TAIWAN
来源：
10TH INTERNATIONAL PARALLEL PROCESSING SYMPOSIUM - PROCEEDINGS OF IPPS '96 | 1996年
关键词：
D O I：
10.1109/IPPS.1996.508034
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
引用
收藏
页码：23 / 27
页数：5
相关论文
共 50 条
  • [31] Automatic loop parallelization: An abstract interpretation approach
    Ricci, L
    PAR ELEC 2002: INTERNATIONAL CONFERENCE ON PARALLEL COMPUTING IN ELECTRICAL ENGINEERING, 2002, : 112 - 118
  • [32] GPU Parallelization of HEVC In-Loop Filters
    Wang, Biao
    de Souza, Diego F.
    Alvarez-Mesa, Mauricio
    Chi, Chi Ching
    Juurlink, Ben
    Ilic, Aleksandar
    Roma, Nuno
    Sousa, Leonel
    INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING, 2017, 45 (06) : 1515 - 1535
  • [33] Parallelization Approaches for Hardware Accelerators - Loop Unrolling Versus Loop Partitioning
    Hannig, Frank
    Dutta, Hritam
    Teich, Juergen
    ARCHITECTURE OF COMPUTING SYSTEMS-ARCS 2009, 22ND INTERNATIONAL CONFERENCE, 2009, 5455 : 16 - 27
  • [34] Loop Parallelization Techniques for FPGA Accelerator Synthesis
    Reiche, Oliver
    Ozkan, M. Akif
    Hannig, Frank
    Teich, Juergen
    Schmid, Moritz
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2018, 90 (01): : 3 - 27
  • [35] PERFECT PIPELINING - A NEW LOOP PARALLELIZATION TECHNIQUE
    AIKEN, A
    NICOLAU, A
    LECTURE NOTES IN COMPUTER SCIENCE, 1988, 300 : 221 - 235
  • [36] Loop Parallelization using Dynamic Commutativity Analysis
    Vasiladiotis, Christos
    Lozano, Roberto Castaneda
    Cole, Murray
    Franke, Bjorn
    CGO '21: PROCEEDINGS OF THE 2021 IEEE/ACM INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION (CGO), 2021, : 150 - 161
  • [37] Algorithmic concept recognition support for automatic parallelization: A case study on loop optimization and parallelization
    Di Martino, B
    JOURNAL OF INFORMATION SCIENCE AND ENGINEERING, 1998, 14 (01) : 191 - 203
  • [38] Loop Nests Parallelization for Digital System Synthesis
    Chemeris, Alexander
    Gorunova, Julia
    Lazorenko, Dmiry
    PROCEEDINGS OF IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS 2013), 2013,
  • [39] Map-Reduce Inspired Loop Parallelization on CGRA
    Shao, Shengjia
    Yin, Shouyi
    Liu, Leibo
    Wei, Shaojun
    2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2014, : 1231 - 1234
  • [40] Loop parallelization in multi-dimensional Cartesian space
    Parsa, Saeed
    Lotfi, Shahriar
    PERSPECTIVES OF SYSTEMS INFORMATICS, 2007, 4378 : 335 - +
12345