A transformational codesign methodology

被引:0
|
作者
Cheung, TKY
Hellestrand, G
Kanthamanon, P
机构
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We present a hardware/software codesign methodology using formal transformations. The goal is to refine a given function specification of a task to an operational structure involving both hardware and software components, The refinement process is separated into two levels, the algorithmic and the structural, Within each level, refinement is accomplished by applying sequences of transformations that preserve the functionality of an initial specification, This allows various 'correct' design alternatives to be generated and their costs analyzed, At the algorithmic level, different algorithm designs are explored, each producing a computational schedule that has a different performance cost. At the structural level, different spatial structures with different resources and performance costs are explored. These costs which characterize the designs are used to assist in the hardware/software partitioning, An example is used throughout to illustrate this methodology.
引用
收藏
页码:299 / 305
页数:7
相关论文
共 50 条
  • [31] Integrated Flow-Control Codesign Methodology for Flow-Based Microfluidic Biochips
    Yao, Hailong
    Wang, Qin
    Ru, Yizhong
    Cai, Yici
    Ho, Tsung-Yi
    [J]. IEEE DESIGN & TEST, 2015, 32 (06) : 60 - 68
  • [32] A novel hardware/software codesign methodology based on dynamic reconfiguration with impulse C and CoDeveloper
    Antola, Anna
    Santambrogio, Marco Domenico
    Fracassi, Marco
    Gotti, Pamela
    Sandionigi, Chiara
    [J]. 2007 3RD SOUTHERN CONFERENCE ON PROGRAMMABLE LOGIC, PROCEEDINGS, 2007, : 221 - +
  • [33] CoDesign
    Maillet-Contoz, Laurent
    [J]. IEEE Potentials, 1997, 16 (04): : 13 - 14
  • [34] Integrated Control-Fluidic Codesign Methodology for Paper-Based Digital Microfluidic Biochips
    Wang, Qin
    Ji, Weiqing
    Li, Zeyan
    Cheong, Haena
    Kwon, Oh-Sun
    Yao, Hailong
    Ho, Tsung-Yi
    Shin, Kwanwoo
    Li, Bing
    Schlichtmann, Ulf
    Cai, Yici
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 39 (03) : 613 - 625
  • [35] A factorization/defactorization methodology based on Data Flow Petri Nets for an efficient hardware/software codesign
    Abellard, Alexandre
    Abellard, Patrick
    [J]. 2007 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS, VOLS 1-8, 2007, : 446 - +
  • [36] A hardware/software codesign methodology and workbench for predictable development of hard real-time systems
    Axelsson, J
    [J]. NINTH EUROMICRO WORKSHOP ON REAL TIME SYSTEMS, PROCEEDINGS, 1997, : 179 - 179
  • [37] A Methodology for Predicting Application-specific Achievable Memory Bandwidth for HW/SW-Codesign
    Goebel, Matthias
    Elhossini, Ahmed
    Juurlink, Ben
    [J]. 2017 EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD), 2017, : 533 - 537
  • [38] Protocol codesign
    Saïdi, H
    Stavridou, V
    Duterte, B
    [J]. SECURITY PROTOCOLS, 2005, 3364 : 106 - 118
  • [39] Quantum Codesign
    Tomesh, Teague
    Martonosi, Margaret
    [J]. IEEE MICRO, 2021, 41 (05) : 33 - 40
  • [40] 7P METHODOLOGY TO GENERATE CONVERS(A)CTIONS FOCUSED ON TRANSFORMATIONAL LEADERSHIP
    Ibarrondo, Imanol
    Barandika, Gotzone
    [J]. EDULEARN16: 8TH INTERNATIONAL CONFERENCE ON EDUCATION AND NEW LEARNING TECHNOLOGIES, 2016, : 3762 - 3766