Spectral RTL test generation for gate-level stuck-at faults

被引：0

作者：

Yogi, Nitin ^{[1
]}

Agrawal, Vishwani D. ^{[1
]}

机构：

[1] Auburn Univ, Dept Elect & Comp Engn, Auburn, AL 36849 USA

来源：

PROCEEDINGS OF THE 15TH ASIAN TEST SYMPOSIUM | 2006年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We model RTL faults as stuck-at faults on primary inputs, primary outputs, and flip-flops. Tests for these faults are analyzed using Hadamard matrices for Walsh functions and random noise level at each primary input. This information then helps generate vector sequences. At the gate-level, a fault simulator and an integer linear program (ILP) compact the test sequences. We give results for four ITC'99 and four ISCAS'89 benchmark circuits, and an experimental processor. The RTL spectral vectors performed equally well on multiple gate-level implementations. Compared to a gate-level ATPG, RTL vectors produced similar or higher coverage its shorter CPU times.

引用

页码：83 / +

页数：3

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