Comparison between the behaviour of punch-through and non-punch-through insulated gate bipolar transistors under high temperature reverse bias stress

被引：2

作者：

Maiga, CO ^{[1
]}

Toutah, H ^{[1
]}

Tala-Ighil, B ^{[1
]}

Boudart, B ^{[1
]}

机构：

[1] LUSAC, F-50130 Octeville, France

来源：

MICROELECTRONICS RELIABILITY | 2004年 / 44卷 / 9-11期

关键词：

D O I：

10.1016/j.microrel.2004.07.040

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The aim of this work is a comparative study of the High Temperature Reverse Bias (HTRB) stress effects on the Punch-Through (PT) and Non-Punch-Through (NPT) Insulated Gate Bipolar Transistors. The technological difference between these transistors is the N+ buffer layer, which is only built in the PT structure. These two different structures ofIGB transistors have practically the same electric parameters: V-CEmax=600V; I-CEmax = 16A for the PT-IGBT and V-CEmax=600V; I-CEmax. = 16A for the NPT one at 25degreesC. The electric stress has been achieved during 1200 hours at 140degreesC with 0.8V(CEmax). Collector - Emitter bias. The obtained results show the variation of the threshold voltage, the on-state voltage drop and switching parameters under HTRB stress effect. So, some interesting information concerning the ageing of these two types of IGBT under this stress effect have been highlighted. (C) 2004 Elsevier Ltd. All rights reserved.

引用

页码：1461 / 1465

页数：5

共 12 条

[11] Characterization of punch-through phenomenon in SiC-SBD by capacitance-voltage measurement at high reverse bias voltage
Funaki, Tsuyoshi
Matsuzaki, Shuntaro
Kimoto, Tsunenobu
Hikihara, Takashi
IEICE ELECTRONICS EXPRESS, 2006, 3 (16): : 379 - 384
[12] Investigation of mechanical stress effect on electrical behavior of Trench Punch Through IGBT under short-circuit condition at low and high temperature
Azzopardi, S.
El Boubkari, K.
Belmehdi, Y.
Deletage, J. Y.
Woirgard, E.
PROCEEDINGS OF THE 2011-14TH EUROPEAN CONFERENCE ON POWER ELECTRONICS AND APPLICATIONS (EPE 2011), 2011,

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