In-Memory Computing Based Hardware Accelerator Module for Deep Neural Networks

In recent years, AI/ML has been increasingly becoming a part of our daily lives and in the technology around us. With this increasing prevalence, they currently provide the most effective solutions to a wide range of image recognition, speech recognition, and natural language processing challenges. The demand for fast and efficient calculations of increasingly complex models has gained immense importance. One of the biggest technical limitations faced today is the Von Neumann bottleneck. However, the data movement between memory tiers can be reduced by incorporating in-memory computing modules into the architecture. The possibility of using specialized circuits to improve the efficiency of matrix multiplication was attempted on a small test neural network. We focus on using SRAM-based in-memory computing modules, that use binary weights and inputs which can offer a significant improvement to performance and efficiency without a heavy impact on the accuracy of the models.