Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability

被引：0

作者：

Kirsch, P. D. ^{[1
]}

Quevedo-Lopez, M. A. ^{[2
]}

Krishnan, S. A. ^{[4
]}

Krug, C. ^{[4
]}

AlShareef, H. ^{[2
]}

Park, C. S. ^{[4
]}

Harris, R. ^{[3
]}

Moumen, N.

Neugroschel, A. ^{[4
]}

Bersuker, G. ^{[4
]}

Lee, B. H. ^{[1
]}

Wang, J. G. ^{[5
]}

Pant, G. ^{[5
]}

Gnade, B. E. ^{[5
]}

Kim, M. J. ^{[5
]}

Wallace, R. M. ^{[5
]}

Jur, J. S. ^{[6
]}

Lichtenwalner, D. J. ^{[6
]}

Kingon, A. I. ^{[6
]}

Jammy, R. ^{[1
]}

机构：

[1] IBM Corp, Armonk, NY 10504 USA

[2] Texas Instruments Inc, Dallas, TX 75265 USA

[3] AMD, Sunnyvale, CA USA

[4] SEMATECH, Austin, TX 78741 USA

[5] Univ Texas Dallas, Mat Sci & Engn, Richardson, TX 75083 USA

[6] N Carolina State Univ, Mat Sci & Engn, Raleigh, NC 27695 USA

来源：

2006 INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 | 2006年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the following: low threshold voltage (V-T=0.33V), low equivalent oxide thickness (EOT=0.91nm) (T-inv,,=1.3nm) and 83% SiO2 mobility. Key enablers of this result are 1) La doped HfSiON for n-FET V-T tuning 2) HfO2:SiO2 alloy ratio with 10% SiO2 suppressing crystallization up to 1070 degrees C, 3) interlayer SiO2 (IL) to reduced bias temperature instability (BTI) and 4) plasma nitridation (N*)/post nitridation anneal (PNA) sequence for EOT scaling. This work advances high-k/band edge metal gate (MG) efforts by showing scalability of HfLaSiON to EOT=0.91nm without mobility or BTI trade-off, while matching the VT of a SiO2/n-PoIySi control.

引用

页码：370 / +

页数：3

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