Co-simulation virtual platform for reconfigurable multiprocessor hybrid cores development

In this paper we present a Virtual Platform that assists to design reconfigurable Multiprocessor Cores that include software and custom hardware sections. The simulation of the latter integration of the Cores into a System-on-Programmable-Chip (SoPC) device will be also covered by the Platform. The environment is built with a set of reusable VHDL described functions, models and automatic test methods. The applicability of this cosimulation approach is exposed with a real application for the development of a autonomous ATA host and FAT processor with two microcontrollers embedded.