Area-efficient nonvolatile carry chain based on pass-transistor/atom-switch hybrid logic

被引：4

作者：

Bai, Xu ^{[1
]}

Tsuji, Yukihide ^{[1
]}

Sakamoto, Toshitsugu ^{[1
]}

Morioka, Ayuka ^{[1
]}

Miyamura, Makoto ^{[1
]}

Tada, Munehiro ^{[1
]}

Banno, Naoki ^{[1
]}

Okamoto, Koichiro ^{[1
]}

Iguchi, Noriyuki ^{[1
]}

Hada, Hiromitsu ^{[1
]}

机构：

[1] NEC Corp Ltd, Green Platform Res Labs, Tsukuba, Ibaraki 3058501, Japan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2016年 / 55卷 / 04期

关键词：

FPGAS;

D O I：

10.7567/JJAP.55.04EF01

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

For the first time, an area-efficient nonvolatile carry chain combining look-up tables and a pass-transistor-logic-based adder is newly developed using complementary atom switches without additional CMOS circuits. A proposed tristate switch composed of three pairs of complementary atom switches selects one of "0", "1", and the "carry_in" signal as the input of a common multiplexer for both a look-up table and an adder. The developed nonvolatile carry chain achieves the reductions of 20% area, 17% delay, and 17% power consumption, respectively, in comparison with a conventional nonvolatile carry chain using dedicated CMOS gates. (C) 2016 The Japan Society of Applied Physics

引用

页数：5

共 9 条

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