Performance Evaluation of Data Mining Algorithms on Three Generations of Intel® Microarchitecture

被引:0
|
作者
Sadasivam, Satish Kumar [1 ]
Selvi, S. Thamarai [2 ]
机构
[1] IBM Syst & Technol Lab, Bangalore, Karnataka, India
[2] Madras Inst Technol, Dept Comp Technol, Madras, Tamil Nadu, India
关键词
Microarchitecture; performance evaluation; computer architecture; data mining; cycle accounting; WORKLOAD;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Data Mining algorithms and machine learning techniques form a key part of the majority of computing applications today. They are becoming an inherent part of business decision processes, e-commerce, social networking and social media applications as well as commercial and scientific computing applications. It is becoming increasingly important to provide a high performance computing platform for these emerging data mining applications. In this paper we explore the performance characteristics of the data mining benchmark suite MineBench across three "tock" generations of Intel microarchitecture. Our objective is to study the impact of microarchitecture improvements on the performance of data mining algorithms. We present comparative microarchitecture characteristics between data mining algorithms and SPEC INT 2006 benchmarks. We have proposed a generic cycle accounting methodology to attribute performance improvements to various units of the microprocessor. The proposed methodology helps differentiate the impact on performance due to front-end and back-end microarchitecture improvements.
引用
收藏
页码:334 / 341
页数:8
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