Using integer linear programming in test-bench generation for evaluating communication processors

被引:0
|
作者
Senn, Eric [1 ]
Monnereau, David [1 ]
Rossi, Andre [1 ]
Julien, Nathalie [1 ]
机构
[1] Univ Bretagne Sud, Lab STICC, CNRS, UMR 3192, F-56321 Lorient, France
关键词
D O I
10.1109/DSD.2009.236
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents an innovative way to build flexible benchmarks based on micro-architecture independent characteristics. The proposed approach enables the testing and stressing of processors in order to reflect the real nature of applications and give meaningful information to the designers. The use of a limited number of basic blocs hand-coded in assembly, wisely chosen and arranged, enables to copy the behaviour of proprietary applications. An Integer Linear Programming approach is used to find the number of basic blocs and their iterations. An enumerative method is used to build the basic blocs base. Our approach is used to generate synthetic testbenches representative of the Media Bench applications suite. Real measurements conducted on an Intel processor show interesting and promising results, which will be discussed in details in this paper.
引用
收藏
页码:217 / 220
页数:4
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