共 50 条
- [3] Impact of Device Parameters on the Threshold Voltage of Double-Gate, Tri-Gate and Gate-All-Around MOSFETs [J]. PROCEEDINGS OF 2018 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES KOLKATA CONFERENCE (IEEE EDKCON), 2018, : 596 - 599
- [4] Local volume inversion and corner effects in triangular gate-all-around MOSFETs [J]. ESSDERC 2006: PROCEEDINGS OF THE 36TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2006, : 359 - +
- [5] Modeling of nanoscale gate-all-around MOSFETs [J]. IEEE ELECTRON DEVICE LETTERS, 2004, 25 (05) : 314 - 316
- [6] From gate-all-around to nanowire MOSFETs [J]. CAS 2007 INTERNATIONAL SEMICONDUCTOR CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2007, : 11 - 17
- [7] Structure effects in the gate-all-around silicon nanowire MOSFETs [J]. EDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGS, 2007, : 129 - 132
- [9] Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs [J]. 2012 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2012,