New categories of Safe Faults in a processor-based Embedded System

被引:1
|
作者
Gursoy, C. [2 ]
Jenihhin, M. [2 ]
Oyeniran, A. S. [2 ]
Piumatti, D. [1 ]
Raik, J. [2 ]
Reorda, M. Sonza [1 ]
Ubar, R. [2 ]
机构
[1] Politecn Torino, Dip Automat & Informat, Turin, Italy
[2] Tallinn Univ Technol, Tallinn, Estonia
基金
欧盟地平线“2020”;
关键词
IDENTIFYING UNTESTABLE FAULTS; IDENTIFICATION;
D O I
10.1109/ddecs.2019.8724642
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The identification of safe faults (i.e., faults which are guaranteed not to produce any failure) in an electronic system is a crucial step when analyzing its dependability and its test plan development. Unfortunately, safe fault identification is poorly supported by available EDA tools, and thus remains an open problem. The complexity growth of modern systems used in safety-critical applications further complicates their identification. In this article, we identify some classes of safe faults within an embedded system based on a pipelined processor. A new method for automating the safe fault identification is also proposed. The safe faults belonging to each class are identified resorting to Automatic Test Pattern Generation (ATPG) techniques. The proposed methodology is applied to a sample system built around the OpenRisc1200 open source processor.
引用
收藏
页数:4
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