Sequential equivalence checking without state space traversal

被引：29
|
作者：
van Eijk, CAJ [1 ]
机构：
[1] Eindhoven Univ Technol, Design Automat Sect, NL-5600 MB Eindhoven, Netherlands
来源：
DESIGN, AUTOMATION AND TEST IN EUROPE, PROCEEDINGS | 1998年
关键词：
D O I：
10.1109/DATE.1998.655922
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Because general algorithms for sequential equivalence checking require a state space traversal of the product machine, they are computationally expensive. In this paper; we present a new method for sequential equivalence checking which utilizes functionally equivalent signals to prove the equivalence of both circuits, thereby avoiding the state space traversal. The effectiveness of the proposed method is confirmed by experimental results on retimed and optimized ISCAS'89 benchmarks.
引用
收藏
页码：618 / 623
页数：6
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