CMOS Current-Reversing Circuit

被引：0

作者：

Liu, Weihsing ^{[1
]}

机构：

[1] Natl Formosa Univ, Dept Elect Engn, Huwei Township, Yunlin, Taiwan

来源：

2018 7TH IEEE INTERNATIONAL SYMPOSIUM ON NEXT-GENERATION ELECTRONICS (ISNE) | 2018年

关键词：

current-mod; complementary; current-reversing; MULTIPLIER;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a CMOS current-reversing circuit has been proposed. The layout of the proposed circuit has been made by using the N-well 0.35 mu m 2p4m process parameters. According to the post-layout simulation results, as the supply voltage is set to 2V, the input current range of the proposed current-reversing circuit can he +/- 150 mu A, the corresponding output linear error is less than 2%, and the output offset current is only -0.321 mu A. Moreover, the maximum power consumption is 0.42mW and when the input current is 120 mu A, the 3-dB bandwidth can be 120 MHz. Simulation results are consistent with the theoretic analysis. The proposed circuit is expected to be useful in current-mode circuits design and other related applications.

引用

页码：166 / 169

页数：4

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