Phase-Rotator-Based All-Digital Phase-Locked Loop for a Spread-Spectrum Clock Generator

被引：9

作者：

Yang, Jaehyeok ^{[1
]}

Lee, Joon-Yeong ^{[1
]}

Lim, Sun-Jae ^{[1
]}

Bae, Hyeon-Min ^{[1
]}

机构：

[1] Korea Adv Inst Sci & Technol, Dept Elect Engn, Taejon 305701, South Korea

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2014年 / 61卷 / 11期

基金：

新加坡国家研究基金会;

关键词：

Electromagnetic interference (EMI); phase-locked loop (PLL); phase rotator; spread-spectrum clock (SSC);

D O I：

10.1109/TCSII.2014.2356893

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A phase-rotator-based all-digital phase-locked loop for spread-spectrum clock generation is presented. It combines a dual-tone triangular and a random modulation profile to achieve a balance between electromagnetic interference reduction and broadband jitter generation. The test chip, fabricated using a 90-nm CMOS process, achieves a 43-dB total EMI reduction at the resolution bandwidth of 100 Hz without incurring a notable bit-error-rate penalty at the receiver's side and consuming only 15.8 mW at 6 GHz from a 1-V supply.

引用

页码：880 / 884

页数：5

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