A novel delayed flip-flop circuit using resonant tunneling logic gates

被引：8

作者：

Maezawa, K

Matsuzaki, H

Akeyoshi, T

Osaka, J

Yamamoto, M

Otsuji, T

机构：

[1] NTT, Syst Elect Labs, Atsugi, Kanagawa 24301, Japan

[2] NTT, Opt Network Syst Labs, Atsugi, Kanagawa 24301, Japan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS | 1998年 / 37卷 / 2B期

关键词：

resonant tunneling diode; HEMT; delayed flip-flop; InP; InGaAs; InAlAs;

D O I：

10.1143/JJAP.37.L212

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

A novel delayed flip-flop circuit using monostable-bistable transition logic elements (MOBILEs) was proposed, and was fabricated using resonant-tunneling-diode/high-electron-mobility-transistor integration technology on an InP substrate. Error free operations at up to 12.5 Gb/s were demonstrated at room temperature.

引用

页码：L212 / L213

页数：2

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