A reconfigurable FPGA-based 16-channel front-end for MRI

被引:0
|
作者
Dalal, Ishaan L. [1 ]
Fontaine, Fred L. [1 ]
机构
[1] Cooper Union Adv Sci & Art, Ctr Signal Proc Commun & Comp Engn Res, Dept Elect Engn, New York, NY 10003 USA
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Parallel MRI acquisitions are generally reconstructed off-tine on PCs and computer clusters. Building upon an existing multichannel digital receiver, we present an innovative single-FPGA front-end that performs real-time 2D-FFT reconstruction from arrays of up to 16 coils. Partial reconfiguration enables rapid switching of FPGA modules for maximal flexibility and lower hardware cost. After an acquisition has been buffered, more complicated parallel MRI reconstruction techniques can replace receiver logic. Alternatively, the front-end can be used as a hardware-accelerated reconstruction engine with other receivers or for PCs. As proof-of-concept for real-time non-cartesian reconstruction, a reconfigurable module for next-neighbor regridding of spiral MRI is also demonstrated.
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页码:1860 / +
页数:2
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