Design of a hardware/software co-simulation/verification platform

被引：0
|
作者：
Wu, Ye [1 ]
Jiang, Hai [2 ]
Wei, Chao [2 ]
机构：
[1] Beijing Univ Posts & Telecommun, Sch Informat Engn Dept, Beijing 100876, Peoples R China
[2] Nokia Res Ctr, Flexible Radio Implementat Grp, Beijing 100013, Peoples R China
来源：
IMECS 2007: INTERNATIONAL MULTICONFERENCE OF ENGINEERS AND COMPUTER SCIENTISTS, VOLS I AND II | 2007年
关键词：
co-simulation; verification;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
Today's ASIC or SoC design increasingly demands for accurate and rapid development of a complex heterogeneous system. Hardware/software co-simulation is a novel methodology that provides effective verification and fast prototyping. In this paper, we propose a custom FPGA based hardware/software co-simulation/verification platform with Xilinx Virtex-II Pro. The aim of our design is to provide a flexible and reusable simulation platform mainly for system level co-verification in the environment of both C and Matlab.
引用
收藏
页码：488 / +
页数：2
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