On magnitudes in memory: An internal clock account of space-time interaction

被引:25
|
作者
Cai, Zhenguang G. [1 ,2 ]
Connell, Louise [2 ,3 ]
机构
[1] UCL, Dept Expt Psychol, 26 Bedford Way, London WC1H 0AP, England
[2] Univ Manchester, Sch Psychol Sci, Manchester, Lancs, England
[3] Univ Lancaster, Dept Psychol, Lancaster, England
关键词
Time perception; Space-time interaction; Magnitude; Internal clock; Memory interference; SPEEDING-UP; VISUAL FLICKER; INTERVAL; NUMBER; REPRESENTATION; PERCEPTION; COMMON; MODEL; INTERFERENCE; NUMEROSITY;
D O I
10.1016/j.actpsy.2016.04.003
中图分类号
B84 [心理学];
学科分类号
04 ; 0402 ;
摘要
Traditionally, research on time perception has diverged into a representational approach that focuses on the interaction between time and non-temporal magnitude information like spatial distance, and a mechanistic approach that emphasizes the workings and timecourse of components within an internal clock. We combined these approaches in order to identify the locus of space time interaction effects in the mechanistic framework of the internal clock model. In three experiments, we contrasted the effects of spatial distance (a long- vs. short-distance line) on time perception with those of visual flicker (a flickering vs. static stimulus) in a duration reproduction paradigm. We found that both a flickering stimulus and a long-distance line lengthened reproduced time when presented during time encoding. However, when presented during time reproduction, a flickering stimulus shortened reproduced time but a long-distance line had no effect. The results thus show that, while visual flickers affects duration accumulation itself, spatial distance instead biases the memory of the accumulated duration. These findings are consistent with a clock-magnitude account of space time interaction whereby both temporal duration and spatial distance are represented as mental magnitudes that can interfere with each other while being kept in memory, and places the locus of interaction between temporal and non-temporal magnitude dimensions at the memory maintenance stage of the internal clock model. (C) 2016 Elsevier B.V. All rights reserved.
引用
收藏
页码:1 / 11
页数:11
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