Improved Envelope Load Pull System for High Power Transistors Characterization

被引：0
|
作者：
Malfavaun-Gonzalez, E. J. [1 ]
Pulido-Gaytan, M. A. [1 ]
Urbina-Martinez, J. [2 ]
Figueroa-Resendiz, B. E. [2 ]
Loo-Yau, J. R. [2 ]
Maya-Sanchez, M. C. [1 ]
Reynoso-Hernandez, J. A. [1 ]
机构：
[1] CICESE, Ensenada, BC, Mexico
[2] CINVESTAV, Ctr Invest & Estudios Avanzados, IPN, Guadalajara, Jalisco, Mexico
来源：
2016 IEEE MTT-S LATIN AMERICA MICROWAVE CONFERENCE (LAMC) | 2016年
关键词：
Envelope Load-Pull; GaN HEMT transistors; transistor characterization;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper deals with the implementation of an Envelope Load-Pull system suitable for GaN HEMT power transistors characterization. The novelty of the system, compared with previous Envelope Load-Pull systems lies in its capability to work with packaged transistors at 3.5GHz and a 15W output, scalable up to 20W. Furthermore, due to broadband components, the system presented is easily scalable up to 18GHz with simple component changes.
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页数：3
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