共 50 条
- [2] Register allocation methods of improved software pipelining for loops with conditional branches [J]. ELECTRONICS AND COMMUNICATIONS IN JAPAN PART III-FUNDAMENTAL ELECTRONIC SCIENCE, 2006, 89 (12): : 59 - 69
- [3] TRACE SOFTWARE PIPELINING - A NOVEL TECHNIQUE FOR PARALLELIZATION OF LOOPS WITH BRANCHES [J]. PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, 1994, 50 : 359 - 362
- [4] A formal model of software pipelining loops with conditions [J]. 11TH INTERNATIONAL PARALLEL PROCESSING SYMPOSIUM, PROCEEDINGS, 1997, : 554 - 558
- [7] Software pipelining of loops by the method of modulo scheduling [J]. Programming and Computer Software, 2007, 33 : 307 - 315
- [8] Predicated software pipelining technique for loops with conditions [J]. FIRST MERGED INTERNATIONAL PARALLEL PROCESSING SYMPOSIUM & SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING, 1998, : 176 - 180