共 50 条
- [1] Software pipelining loops with conditional branches PROCEEDINGS OF THE 29TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE - MICRO-29, 1996, : 262 - 273
- [2] A new architecture for branch-intensive loops ADVANCES IN PARALLEL AND DISTRIBUTED COMPUTING - PROCEEDINGS, 1997, : 241 - 246
- [3] A formal model of software pipelining loops with conditions 11TH INTERNATIONAL PARALLEL PROCESSING SYMPOSIUM, PROCEEDINGS, 1997, : 554 - 558
- [5] Software pipelining of loops by the method of modulo scheduling Programming and Computer Software, 2007, 33 : 307 - 315
- [6] Predicated software pipelining technique for loops with conditions FIRST MERGED INTERNATIONAL PARALLEL PROCESSING SYMPOSIUM & SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING, 1998, : 176 - 180
- [9] Time Optimal Software Pipelining of Loops with Control Flows International Journal of Parallel Programming, 2003, 31 : 339 - 391