MIPS Extension for a TCAM Based Parallel Architecture for Fast IP Lookup

This paper discusses the feasibility of the use of minimum independent prefix set (MIPS) algorithm in a ternary content addressable memory (TCAM) based parallel architecture proposed for high speed packet switching. MIPS algorithm is proposed earlier to transform a forwarding table into one that contains the minimum independent prefix set. In this paper we propose MIPS algorithm to be integrated into a TCAM based parallel IP lookup engine. We first analyze the table compression performance of the MIPS algorithm and demonstrate that it may lead to routing table expansion rather than compression in general. For certain cases on the other hand, MIPS algorithm performs well and is suitable to be used in TCAM based parallel IP lookup engine. We demonstrate that with the adoption of the MIPS algorithm, the overall performance, in terms of throughput, of the IP lookup engine can be enhanced considerably.