共 50 条
- [41] Design of IIR Digital Integrators Using a Magnitude Constrained Minimax Phase Error Method PROCEEDINGS OF THE 36TH CHINESE CONTROL CONFERENCE (CCC 2017), 2017, : 5585 - 5589
- [42] CLOSED-FORM DESIGN OF MAXIMALLY FLAT FIR FRACTIONAL DELAY FILTERS USING INTERLACED SAMPLING METHOD 2013 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS), 2013, : 419 - 424
- [43] Closed-Form Design of Maximally Flat FIR Differentiators with Fractional Delay Using Interlaced Sampling Method 2013 9TH INTERNATIONAL CONFERENCE ON INFORMATION, COMMUNICATIONS AND SIGNAL PROCESSING (ICICS), 2013,
- [45] Closed Form Approach for Constrained Design of nth-Order IIR Digital Differentiator Circuits, Systems, and Signal Processing, 2023, 42 : 3385 - 3411
- [46] Digital integrator design using recursive Romberg integration rule and fractional sample delay 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 2726 - 2729
- [47] Closed-form design of maxflat R-REGULAR IIR MTH-band filters using blockwise waveform moments PROCEEDINGS OF THE 2007 15TH INTERNATIONAL CONFERENCE ON DIGITAL SIGNAL PROCESSING, 2007, : 296 - +
- [50] Closed-form design of fractional delay FIR filter uisng discrete Hartley transform TENCON 2007 - 2007 IEEE REGION 10 CONFERENCE, VOLS 1-3, 2007, : 251 - +