A 71-76 GHz Chip Set for Wireless Communication in 65-nm CMOS Technology

被引:5
|
作者
Kuo, Jhe-Jia [1 ]
Lin, Wei-Heng [1 ]
Kuo, Che-Chun [1 ]
Tseng, Jeffrey Ronald [1 ]
Tsai, Zuo-Min [1 ]
Lin, Kun-You [1 ]
Wang, Huei [1 ]
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
关键词
CMOS; low noise amplifier; mixer; power amplifier;
D O I
10.1109/MWSYM.2009.5165664
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a chip set of RF front-end circuits using 65-nm CMOS technology. The chip set includes a LNA, a down-conversion mixer, an up-conversion mixer and a medium power amplifier. The LNA has the 3-dB bandwidth from 68 to 75 GHz with a peak value of 17 dB. The down-conversion mixer has a conversion loss of better than -5 dB from 53 to 73 GHz at 4 dBm LO power. The up-conversion mixer has a conversion loss better than -5 dB from 53 to 75 GHz at 6 dBm LO power. The medium power amplifier delivers 5 dBm P-1dB and 6.7 dBm P-sat at 71 GHz. These results show the potential of the 65-nm CMOS technology in high frequency circuit design.
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页码:189 / +
页数:2
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