Regeneration of Test Patterns for BIST by Using Artificial Neural Networks

被引：0

作者：

Inamoto, Tsutomu ^{[1
]}

Higami, Yoshinobu ^{[1
]}

机构：

[1] Ehime Univ, Grad Sch Sci & Engn, 3 Bunkyo Cho, Matsuyama, Ehime 7908577, Japan

来源：

35TH INTERNATIONAL TECHNICAL CONFERENCE ON CIRCUITS/SYSTEMS, COMPUTERS AND COMMUNICATIONS (ITC-CSCC 2020) | 2020年

关键词：

LSI testing; fault detection; BIST; artificial neural network;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In this paper, we display an approach to detect circuit faults by the built-in self test (BIST) technology. In the BIST for a certain circuit, it is usual to generate test patterns by feeding their seed values to a test pattern generator (TPG), which is contained in a device together with the circuit. It is ideal but impractical to make the device to contain a digital memory that stores effective test patterns. The key idea of the presented approach is to use the artificial neural network (ANN) as such memory on the expectation that an ANN can be implemented as an analog circuit. In addition, this paper investigates the inaccuracy that is inevitable regarding analog components.

引用

页码：137 / 140

页数：4

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