High Speed Wideband Low Phase Noise 2:1 Frequency Divider

被引：0

作者：

Lei, Xuemei ^{[1
]}

Wang, Zhigong ^{[1
]}

Wang, Keping ^{[1
]}

机构：

[1] Southeast Univ, Inst RF & OEICs, Nanjing 210096, Peoples R China

来源：

2009 5TH INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, NETWORKING AND MOBILE COMPUTING, VOLS 1-8 | 2009年

关键词：

frequency divider; high speed; wideband; phase noise; power consumption; optimization;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The paper presents the design of a high-speed wideband low phase noise 2:1 frequency divider. A new differential D-latch topology for the divider is presented. Theoretical analysis and an optimization process for the design are given and various phenomena that dominate the speed, the bandwidth and the phase noise behavior of the frequency dividers are discussed. The simulation results show that the frequency divider has an input frequency range from 36 GHz to 6 CHz with a phase noise level of 137.7 dBc/Hz at an offset of 1 MHz, a core power of 12.58 mW and the core area of 70 mu mx105 mu m in a 90-nm CMOS process.

引用

页码：2567 / 2570

页数：4

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