Optimized process for fabrication of free-standing silicon nanophotonic devices

被引:4
|
作者
Seidler, Paul [1 ]
机构
[1] IBM Res Zurich, Saumerstr 4, CH-8803 Ruschlikon, Switzerland
来源
基金
英国惠康基金;
关键词
CRYSTAL NANOBEAM CAVITY; ETCH PROCESS; CORROSION; FLUORIDE; SURFACE;
D O I
10.1116/1.4983173
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A detailed procedure is presented for fabrication of free-standing silicon photonic devices that accurately reproduces design dimensions while minimizing surface roughness. By reducing charging effects during inductively coupled-plasma reactive ion etching, undercutting in small, high-aspect ratio openings is reduced. Slot structures with a width as small as 40 nm and an aspect ratio of 5.5: 1 can be produced with a nearly straight, vertical sidewall profile. Subsequent removal of an underlying sacrificial silicon dioxide layer by wet-etching to create free-standing devices is performed under conditions which suppress attack of the silicon. Slotted one-dimensional photonic crystal cavities are used as sensitive test structures to demonstrate that performance specifications can be reached without iteratively adapting design dimensions; optical resonance frequencies are within 1% of the simulated values and quality factors on the order of 10 5 are routinely attained. (C) 2017 Author(s).
引用
收藏
页数:9
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