A 4GHz, low latency TCAM in 14nm SOI FinFET technology using a high performance Current Sense Amplifier for AC current surge reduction

被引：0

作者：

Fritsch, Alexander ^{[1
]}

Kugel, Michael ^{[1
]}

Sautter, Rolf ^{[1
]}

Wendel, Dieter ^{[1
]}

Pille, Juergen ^{[1
]}

Torreiter, Otto ^{[1
]}

Kalyanasundaram, Shankar ^{[2
]}

Dobson, Daniel A. ^{[3
]}

机构：

[1] IBM Syst Grp, Hardware Dev, Boblingen, Germany

[2] IBM Syst Grp, Hardware Dev, Bangalore, Karnataka, India

[3] IBM Syst Grp, Hardware Dev, Rochester, MN USA

来源：

ESSCIRC CONFERENCE 2015 - 41ST EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (ESSCIRC) | 2015年

关键词：

CAM; SRAM; TCAM; current sensing; 14nm SOI; circuit design; CIRCUITS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 4GHz, low latency TCAM in 14nm SOI FinFET technology, using a matchline current sensing scheme with an energy consumption of 0.63 fJ/bit/search at 0.9V and a peak current reduction of 50% compared to voltage sensing implementations. A by entry adjustable search depth allows to reduce power consumption for variable size translation tables. The implemented sandwich floorplan enables an area efficient integration of high performance 0.286 mu m(2) 16T-TCAM and 0.143 mu m(2) 8T-SRAM cells.

引用

页码：343 / 346

页数：4

共 6 条

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