共 50 条
- [21] Design of Garbage Free Reversible Multiplier for Low Power Applications 2017 4TH INTERNATIONAL CONFERENCE ON POWER, CONTROL & EMBEDDED SYSTEMS (ICPCES), 2017,
- [22] Multiplier Structures for Low Power Applications in Deep-CMOS 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2011, : 1061 - 1064
- [23] Empirical Analysis of Low Power and High Performance Multiplier COMPUTATIONAL INTELLIGENCE IN DATA MINING, VOL 2, 2015, 32 : 585 - 594
- [24] Multiplier architecture power consumption characterization for low-power DSP applications ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS, 2002, : 741 - 744
- [25] Low Power & High Performance Implementation of Multiplier Architectures PROCEEDINGS OF THE 10TH INDIACOM - 2016 3RD INTERNATIONAL CONFERENCE ON COMPUTING FOR SUSTAINABLE GLOBAL DEVELOPMENT, 2016, : 1989 - 1992
- [28] A High Order (x10) Planar Active Frequency Multiplier at 1.5GHz for Satellite Applications 2012 5TH INTERNATIONAL CONFERENCE ON COMPUTERS AND DEVICES FOR COMMUNICATION (CODEC), 2012,
- [29] A Low Power Hybrid Clock Gating Technique for High Frequency Applications 2015 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, SIGNALS, COMMUNICATION AND OPTIMIZATION (EESCO), 2015,
- [30] Low voltage low power high-speed BiCMOS multiplier Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, 1998, 2