A high order frequency multiplier for low power applications

被引:0
|
作者
Lang, DR [1 ]
机构
[1] Comtech EFData, Tempe, AZ USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
No abstract available
引用
收藏
页码:68 / +
页数:6
相关论文
共 50 条
  • [21] Design of Garbage Free Reversible Multiplier for Low Power Applications
    Nagamani, A. N.
    Kumar, Sharath S.
    Agrawal, Vinod Kumar
    2017 4TH INTERNATIONAL CONFERENCE ON POWER, CONTROL & EMBEDDED SYSTEMS (ICPCES), 2017,
  • [22] Multiplier Structures for Low Power Applications in Deep-CMOS
    Baran, Dursun
    Aktan, Mustafa
    Oklobdzija, Vojin G.
    2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2011, : 1061 - 1064
  • [23] Empirical Analysis of Low Power and High Performance Multiplier
    Hemavathi, K.
    Rao, G. Manmadha
    COMPUTATIONAL INTELLIGENCE IN DATA MINING, VOL 2, 2015, 32 : 585 - 594
  • [24] Multiplier architecture power consumption characterization for low-power DSP applications
    Hong, SJ
    Chin, SS
    Kim, S
    Hwang, W
    ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS, 2002, : 741 - 744
  • [25] Low Power & High Performance Implementation of Multiplier Architectures
    Verma, Gaurav
    Shekhar, Sushant
    Srivastava, Oorja M.
    Maheshwari, Shikhar
    Virdi, Sukhbani Kaur
    PROCEEDINGS OF THE 10TH INDIACOM - 2016 3RD INTERNATIONAL CONFERENCE ON COMPUTING FOR SUSTAINABLE GLOBAL DEVELOPMENT, 2016, : 1989 - 1992
  • [26] HIGH-POWER FREQUENCY MULTIPLIER USING MIS VARACTORS
    SCHUMACHER, F
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1973, MT21 (10) : 648 - 649
  • [27] Novel Low Voltage and Low Power Array Multiplier Design for IoT Applications
    Lin, Jin-Fa
    Chan, Cheng-Yu
    Yu, Shao-Wei
    ELECTRONICS, 2019, 8 (12)
  • [28] A High Order (x10) Planar Active Frequency Multiplier at 1.5GHz for Satellite Applications
    Ladkani, Jyotsna
    Akhil
    Thakkar, Jayesh
    2012 5TH INTERNATIONAL CONFERENCE ON COMPUTERS AND DEVICES FOR COMMUNICATION (CODEC), 2012,
  • [29] A Low Power Hybrid Clock Gating Technique for High Frequency Applications
    Verma, Priyanka
    Selvakumar, J.
    2015 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, SIGNALS, COMMUNICATION AND OPTIMIZATION (EESCO), 2015,
  • [30] Low voltage low power high-speed BiCMOS multiplier
    Cheng, Kuo-Hsing
    Yeha, Yu-Kwang
    Lian, Farn-Son
    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, 1998, 2