System-level power optimization

More features and higher bandwidth needed for new mobile services consume more power than battery technology can provide. Higher performance in information processing produces more heat than cooling technology can dissipate. These trends require power aware design methodologies throughout the entire design. The largest impact on the power consumption can be achieved at the system level where the algorithms and the system architecture are defined In this contribution we present a System-Level design flow and respective EDA support tools for low power designs. We analyze the requirements for such a design technology, which shifts more responsibility to the system architect. We exemplify this approach with a design flow for low power systems. The architecture of a power estimation tool(1) is presented, which is capable to guide the designer in system level and architecture level decisions in the pre-implementation phase. The effectiveness of the approach is demonstrated through some use cases.