Empirical correlation between package-level ball impact test and board-level drop reliability

被引:32
|
作者
Yeh, Chang-Lin [1 ]
Lai, Yi-Shao [1 ]
Chang, Hsiao-Chuan [1 ]
Chen, Tsan-Hsien [1 ]
机构
[1] Adv Semicond Engn Inc, Stress Reliabil Lab, Kaohsiung 811, Taiwan
关键词
D O I
10.1016/j.microrel.2006.07.093
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Package-level ball impact test and board-level drop test are performed and correlated using a specific chip-scale package with solder joints of different Sn-Ag-Cu solder compositions. A positive correlation is found between characteristics of the impact force profile and reliability from the drop test, which provides a supporting basis for the package-level ball impact test to serve as a substitute of the timely and costly board-level drop test. (C) 2006 Published by Elsevier Ltd.
引用
收藏
页码:1127 / 1134
页数:8
相关论文
共 50 条
  • [1] Insights into correlation between board-level drop reliability and package-level ball impact test
    Yeh, Chang-Lin
    Lai, Yi-Shao
    [J]. 56TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE 2006, VOL 1 AND 2, PROCEEDINGS, 2006, : 455 - +
  • [2] Correlation between package-level ball impact test and board-level drop test
    Yeh, CL
    Lai, YS
    Chang, HC
    Chen, TH
    [J]. PROCEEDINGS OF THE 7TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS. 1 AND 2, 2005, : 270 - 275
  • [3] Insights into correlation between board-level drop reliability and package-level ball impact test characteristics
    Yeh, Chang-Lin
    Lai, Yi-Shao
    [J]. IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 2007, 30 (01): : 84 - 91
  • [4] INVESTIGATION OF BOARD-LEVEL AND PACKAGE-LEVEL DROP RELIABILITY OF RF MEMS PACKAGES
    Sun, Li
    DeReus, Dana
    Cunningham, Shawn
    Morris, Art
    [J]. IMCE2009: PROCEEDINGS OF THE ASME INTERNATIONAL MECHANICAL ENGINEERING CONGRESS AND EXPOSITION, VOL 5, 2010, : 225 - 230
  • [5] Simulation of ball-grid-array package during board-level drop test
    Yamin, A. F. M.
    Sufian, A. A.
    [J]. PROCEEDINGS OF MECHANICAL ENGINEERING RESEARCH DAY 2017 (MERD), 2017, : 75 - 76
  • [6] Uncertainty and Reliability Analysis of Chip Scale Package Subjected to Board-level Drop Test
    Sano, Masafumi
    Chou, Chan-Yen
    Hung, Tuan-Yu
    Yang, Shin-Yueh
    Chiang, Kuo-Ning
    [J]. EUROSIME 2009: THERMAL, MECHANICAL AND MULTI-PHYSICS SIMULATION AND EXPERIMENTS IN MICRO-ELECTRONICS AND MICRO-SYSTEMS, 2009, : 183 - 188
  • [7] Reliability and Parametric Study on Chip Scale Package Under Board-Level Drop Test
    Sano, Masafumi
    Chou, Chan-Yen
    Hung, Tuan-Yu
    Yang, Shin-Yueh
    Huang, Chao-Jen
    Chiang, Kuo-Ning
    [J]. IMPACT: 2009 4TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE, 2009, : 470 - 473
  • [8] Correlation studies for component level ball impact shear test and board level drop test
    Wong, E. H.
    Rajoo, R.
    Seah, S. K. W.
    Selvanayagam, C. S.
    van Driel, W. D.
    Caers, J. F. J. M.
    Zhao, X. J.
    Owens, N.
    Tan, L. C.
    Leoni, M.
    Eu, P. L.
    Lai, Y. -S.
    Yeh, C-L
    [J]. MICROELECTRONICS RELIABILITY, 2008, 48 (07) : 1069 - 1078
  • [9] Board level drop test reliability for MCP package
    Zhang Jing
    Du Maohua
    Feng Nufeng
    Taekoo, Lee
    [J]. ICEPT: 2006 7TH INTERNATIONAL CONFERENCE ON ELECTRONICS PACKAGING TECHNOLOGY, PROCEEDINGS, 2006, : 778 - +
  • [10] An approach to adjust the board-level drop test conditions to improve the correlation with product-level drop impact
    Mattila, T. T.
    Ruotoistenmaki, H.
    Raami, J.
    Hokka, J.
    Makela, M.
    Hussa, E.
    Sillanpaa, M.
    Halkola, V.
    [J]. MICROELECTRONICS RELIABILITY, 2014, 54 (04) : 785 - 795