Technology options for next-generation high pin count RF packaging

被引:0
|
作者
Polka, Lesley A. [1 ]
Hsu, Rockwell [1 ]
Myers, Todd B. [1 ]
Chen, Jing H. [1 ]
Bao, Andy [1 ]
Hsieh, Cheng-Chieh [1 ]
Davies-Venn, Emile [1 ]
Palmer, Eric [1 ]
机构
[1] Intel Corp, 5000 W Chandler Blvd, Chandler, AZ 85226 USA
关键词
D O I
10.1109/ECTC.2007.373919
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Three packaging technologies are evaluated for application to next-generation RF products, particularly the Radio and MAC/Baseband components for WLAN-cards. The trends for WLAN card packaging point to a need for ever-increasing pin counts in smaller form factors. at an affordable cost. The three technologies considered are leadframe, patternable leadframe and ball grid array (BGA). These technologies are evaluated based upon performance (thermal, mechanical and electrical), manufacturability and design attributes. Data from modeling and assembly builds are presented. The key point of the paper is that increasing on-die integration for functional-rich, multiple-input / multiple output (MIMO)/multi-mode RF products is driving a need to investigate emerging package technologies.. This paper presents a data based evaluation of three front-runner technologies: leadframe body-size extensions, patternable leadframe technologies and BGA. The key unique contributions of this paper are a demonstration of the manufacturability of higher pin count (150+), larger leadframe and patternable leadframe packages than have been previously been demonstrated and a test-vehicle, design-of-experiments comparison of the three leading technologies considered for next-generation RF product packaging.
引用
收藏
页码:1000 / +
页数:3
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