共 50 条
- [21] Optimization of the structure of multi-level parallel assembling [J]. INTELLIGENT MANUFACTURING SYSTEMS 2003, 2003, : 235 - 238
- [22] PMLS - A PARALLEL MULTI-LEVEL VLSI SIMULATOR [J]. MICROPROCESSING AND MICROPROGRAMMING, 1989, 27 (1-5): : 571 - 577
- [23] A multi-level and parallel strategy for structural analysis [J]. COMPUTATIONAL PLASTICITY: FUNDAMENTALS AND APPLICATIONS, PTS 1 AND 2, 1997, : 1790 - 1797
- [24] Parallel and multi-level strategies for structural analysis [J]. NUMERICAL METHODS IN ENGINEERING '96, 1996, : 599 - 604
- [28] Implementation of an Online Multi-level and Device-Independent Time and Attendance System [J]. PRODUCT-FOCUSED SOFTWARE PROCESS IMPROVEMENT, 2013, 7983 : 4 - 4
- [29] Multi-level implementation of delay - Insensitive logic [J]. TENCON 2004 - 2004 IEEE REGION 10 CONFERENCE, VOLS A-D, PROCEEDINGS: ANALOG AND DIGITAL TECHNIQUES IN ELECTRICAL ENGINEERING, 2004, : B187 - B190
- [30] Efficient implementation of multi-level Dragonfly networks with Hamming graph for future optical networks [J]. Journal of Optics, 2023, 52 : 2188 - 2198