Nanoscale p-MOS Thin-Film Transistor With TiN Gate Electrode Fabricated by Low-Temperature Microwave Dopant Activation

被引:12
|
作者
Lu, Yu-Lun [1 ]
Hsueh, Fu-Kuo [2 ]
Huang, Kuo-Ching [3 ]
Cheng, Tz-Yen [1 ]
Kowalski, Jeff M. [4 ]
Kowalski, Jeff E. [4 ]
Lee, Yao-Jen [5 ,6 ]
Chao, Tien-Sheng [1 ]
Wu, Ching-Yi [7 ]
机构
[1] Natl Chiao Tung Univ, Dept Electrophys, Hsinchu 30010, Taiwan
[2] Natl Nano Device Labs, Hsinchu 30078, Taiwan
[3] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 30010, Taiwan
[4] DSG Technol Inc, Morgan Hill, CA 95037 USA
[5] Natl Nano Device Labs, Hsinchu 30010, Taiwan
[6] Natl Chung Hsing Univ, Dept Phys, Taichung 402, Taiwan
[7] Dayeh Univ, Dept Elect Engn, Changhua 51591, Taiwan
关键词
Low temperature; metal gate; microwave (MW) anneal; rapid thermal annealing (RTA); TECHNOLOGY;
D O I
10.1109/LED.2010.2042924
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this letter, nanoscale p-MOS TFTs with a TiN gate electrode were realized using a novel microwave (MW) dopant-activation technique. We compared both low-temperature MW annealing and rapid thermal annealing. We successfully activated the source/drain region and suppressed the short-channel effects using low-temperature MW annealing. This technique is promising from the viewpoint of realizing high-performance and low-cost upper layer nanoscale transistors required for low-temperature 3-D integrated circuit fabrication.
引用
收藏
页码:437 / 439
页数:3
相关论文
共 50 条
  • [32] Low-temperature characteristics of a-Si H thin-film transistor under mechanical strain
    Tsao, S. W.
    Chang, T. C.
    Yang, P. C.
    Wang, M. C.
    Chen, S. C.
    Lu, J.
    Chang, T. S.
    Kuo, W. C.
    Wu, W. C.
    Shi, Y.
    SOLID-STATE ELECTRONICS, 2010, 54 (12) : 1632 - 1636
  • [33] Low-temperature poly-silicon thin-film transistor developed without ion doping
    Keum, C. M.
    Kim, J. K.
    Moon, S. J.
    Joo, S. K.
    Bae, B. S.
    JOURNAL OF INFORMATION DISPLAY, 2014, 15 (03) : 135 - 138
  • [34] Excellent heat resistance polymeric gate insulator for thin-film transistor by low temperature and solution processing
    Kim, Ji Young
    Yi, Mi Hye
    Ahn, Taek
    THIN SOLID FILMS, 2010, 518 (22) : 6280 - 6284
  • [35] Characterization of low-temperature processed single-crystalline silicon thin-film transistor on glass
    Shi, XJ
    Henttinen, K
    Suni, T
    Suni, I
    Lau, SS
    Wong, M
    IEEE ELECTRON DEVICE LETTERS, 2003, 24 (09) : 574 - 576
  • [36] Low-temperature poly-Si thin-film transistor with a N2O-plasma ONO multilayer gate dielectric
    Chang, KM
    Yang, WC
    Hung, BF
    ELECTROCHEMICAL AND SOLID STATE LETTERS, 2004, 7 (07) : G148 - G150
  • [37] ELECTROLESS THIN-FILM NI-P RESISTORS WITH LOW-TEMPERATURE COEFFICIENTS
    FERNANDEZ, M
    MARTINEZDUART, JM
    ALBELLA, JM
    THIN SOLID FILMS, 1984, 112 (01) : L9 - L12
  • [38] Cadmium sulfide thin-film transistors fabricated by low-temperature chemical-bath deposition
    Voss, C
    Subramanian, S
    Chang, CH
    JOURNAL OF APPLIED PHYSICS, 2004, 96 (10) : 5819 - 5823
  • [39] Gate Modulation of Excitatory and Inhibitory Synaptic Plasticity in a Low-Temperature Polysilicon Thin Film Synaptic Transistor
    Duan, Nian
    Li, Yi
    Chiang, Hsiao-Cheng
    Huang, Shin-Ping
    Yin, Kang-Sheng
    Chen, Jia
    Yang, Chung-, I
    Chang, Ting-Chang
    Miao, Xiang-Shui
    ACS APPLIED ELECTRONIC MATERIALS, 2019, 1 (01) : 132 - 140
  • [40] Low-Temperature Solution-Processed Zirconium Oxide Gate Insulators for Thin-Film Transistors
    Li Xifeng
    Xin Enlong
    Zhang Jianhua
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (10) : 3413 - 3416