High-Speed On-Chip Signaling: Voltage or Current-Mode?

In this paper, we investigate several on-chip signaling schemes. Specifically, we compare different voltage-mode (VM) and current-mode (CM) signaling schemes considering power, performance, and robustness. In addition, we propose a new CM signaling scheme that uses a simple NAND-NOR gate transmitter circuit and a current-comparator-based receiver circuit. We implemented each signaling scheme using a 45 nm CMOS technology. The extracted simulation results show that a traditional CM signaling scheme consumes 58-78% less power compared to a traditional buffered VM signaling scheme in the 1-3 GHz frequency range. Our proposed CM signaling scheme consumes up to 95% and 81% lower power compared to buffered VM and existing CM schemes, respectively. In addition, the proposed CM signaling scheme has 37-41% lower latency with similar slew-rates compared to the buffered signaling scheme.